Retrieval of data from storage devices inevitably involves errors whether the errors are one bit in a billion or one bit in a hundred billion. Furthermore, with use and age, portions of the storage devices begin to realize increasing numbers of errors. To reduce the impact of such errors, typical controllers for storage devices such as random access memory, flash memory, hard drives, and optical media include error correction code (ECC) to detect and correct for bit errors. ECC can correct at least single bit errors in the data on the fly, significantly improving the speed and accuracy of data retrieval.
ECC can be implemented in multiple levels of complexity. For instance, a low-level ECC may detect and correct simple single bit errors by decoding ECC bits included with the data on the storage medium. When the low-level ECC code is unable to correct errors in data, the data may be reread from the storage medium in an attempt to resolve the errors. If the errors still exist, a more complex ECC algorithm may attempt to resolve the errors. Furthermore, errors may be reported or logged when error correction involves more than the low-level ECC. Reporting or logging the errors facilitates remapping data destined for degraded storage blocks to avoid irreparable loss or corruption of the data.
Current hard drives such as Integrated Drive Electronics (IDE) or AT Attachment (ATA), Serial ATA (SATA), Consumer-Electronics ATA (CE-ATA), and, CompactFlash+ (CF+) drives implement ECC and remapping algorithms to present a pristine image to their host system. In other words, the designers of, e.g., laptops or desktop computers do not need to invest the money and research into developing the most efficient ECC or remapping algorithms for various hard drives on the market because the hard drives handle ECC and remapping in a manner that is invisible to the host system. As a result, interfaces such as ATA comprise command sets that assume ECC and remapping are performed by the hard drives. Many hard drives with Self Monitoring Analysis and Reporting Technology (SMART) logic also determine whether the drive appears to be failing and report such determinations to the host system.
The advent of low-cost, handheld products that utilize small hard drives such as personal digital assistants (PDAs), phones, and Moving Pictures Experts Group (MPEG) Audio Layer 3 (MP3) players, is driving the manufacturers of these small hard drives to find new and innovative ways to optimize the size and cost of the drives and decrease the time-to-market [see ISO/IEC JTC1/SC29/WG11 MPEG, “International Standard IS 13818-3 Information Technology—Generic Coding of Moving Pictures and Associated Audio, Part 3: Audio”, published 1994; and ISO/IEC JTC1/SC29/WG11 N1229, “MPEG-2 Backwards Compatible CODECS Layer II and III: RACE dTTb Listening Test Report”, Florence, published March 1996]. With regards to the small hard drives, e.g., 1.8 inch, 1.0 inch, and 0.85 inch form factor hard drives, a major portion of the costs for developing and building the drives includes costs for development and memory and a major portion of the time-to-market is utilized in developing and debugging remapping algorithms. The cost of development is significantly impacted by development of fairly complex remapping algorithms. The cost of the memory is significantly impacted by the large incremental costs for the small, non-standard sizes of dynamic random access memory (DRAM) necessary to execute the remapping algorithms. Hosts for such products, on the other hand, typically have significantly larger sizes of memory, which have smaller incremental costs.